As wafer diameter increases over time and lithographic feature size reduces over time, controlling the particulate contamination on a backside of a semiconductor wafer becomes critical. This control is needed due to the fact that the lithographic depth of focus associated with the manufacture of these smaller features becomes more constrained as lithographic IC feature size shrinks. In addition, this depth of focus yield problem is exacerbated by larger wafers which are harder to maintain in a fully planar position. If the wafer, or more specifically the wafer's exposure field, cannot be maintained in a fully planar position during lithographic exposure due to the wafer backside contamination, the lithography tool cannot expose the entire wafer uniformly or accurately, causing die to be scrapped. Therefore, a need exists wherein the contamination on the backside of wafers should be monitored closely for prompt detection and correction in order to improve IC manufacturing over the next few years.
To illustrate the wafer backside contamination problem, FIGS. 1-2 are provided. Prior art FIG. 1 illustrates a semiconductor substrate 10 (wafer) after being processed using a conventional organic wafer chuck. As illustrated in FIG. 1, a contamination signature 14 has been left upon the substrate 10. The contamination signature 14 is transferred onto a backside of the semiconductor wafer simply by virtue of the wafer 10 being placed into contact with the chuck for a normal processing cycle. The contamination in FIG. 1 is the contamination which results when a chuck, that has been processing for some time but still has no visible defects which can be detected by an operator, is placed into contact with the wafer 10. The individual contaminants/particles 12, which form the contamination signature 14 on wafer 10, have been detected by a prior art ex situ laser particle system to provide the illustration of FIG. 1. As semiconductor feature sizes reach a 0.25 micron and less, the individual contaminants 12 upon a backside of the semiconductor wafer 10 will have an increasingly greater effect upon lithographic pattern yield since the depth of focus is continually decreasing as IC technology progresses. Since wafer backside contamination may result in some parts of the wafer lying outside this depth of focus during lithographic exposure processing, yield is being adversely impacted by wafer backside contamination that was previously harmless.
In order to reduce the amount of contamination upon the backside of the semiconductor substrate 10, ceramic or other inorganic wafer chuck compounds have been used. The contamination signature of one such ceramic wafer chuck is illustrated in FIG. 2. In FIG. 2, a semiconductor substrate 20 has been exposed to a ceramic chuck for a normal processing cycle. The ceramic chuck of FIG. 2 is relatively new in that approximately 100 processing cycles have occurred on the ceramic chuck utilized in FIG. 2 prior to the measurement of contamination upon wafer 20. As illustrated in FIG. 2, a pronounced contamination signature 24 is beginning to occur upon the wafer 20, even though the ceramic chuck is relatively unused. In other words, the particulates/contaminants 22 are still being deposited on the backside of the wafer 20 by simple contact between the wafer 20 and the ceramic chuck. Although the ceramic chuck may reduce backside contamination, the wafer 20 is still contaminated in a manner similar to the wafer 10 which was processed using the organic chuck in FIG. 1. Due to the migrations of wafer backside contaminants to device areas as a result of subsequent processing as well as the physical contamination on the backside of wafers, which can effect the formation of small feature sized devices as a result of their effects on the depth of focus, it is important to try to reduce wafer backside contamination beyond that illustrated in FIG. 2. Therefore, it would be advantageous to have an in situ method and apparatus for promptly detecting and correcting backside contamination on semiconductor substrates before yield is impacted or cross-contamination occurs.
One prior art method of monitoring backside contamination of semiconductor wafers is to perform a visual inspection of processing areas between the processing of individual wafers. During the visual inspection, an operator could manually inspect the wafer chuck, the handler, and other processing locations capable of contaminating the wafer, in order to determine whether or not there is any visible contamination upon the wafer chuck. The obvious limitation of this method is that it is a very subjective test whereby, depending upon the individual operator, the results vary. A further limitation of this test is that, as smaller features sizes are being developed, the ability to detect the contamination assumes that it will be visible prior to the contamination causing a problem. The yield-reducing contamination is not always visible to the human eye. Therefore, very small particles which may adversely affect state-of-the-art technology would not be detected. For example, with small feature-sized devices of a 0.25 micron or less, it is possible for a 0.1 or 0.2 micron wafer backside contaminant to cause a shift in the depth of focus field enough to adversely impact yield. In addition, an additive effect occurs in that smaller particles build upon each other to create, in effect, larger particles which cause the contamination issues previously discussed. A particle of this size would not be detectable by the human eye, yet cause substantial financial loss to an IC manufacturer.
A final limitation of the visual inspection process is the fact that it requires the processing tools to be designed such that the processing chucks are actually visible to the operator. This is a limitation in the tools and, in fact, many tools do not allow such a visual inspection to occur. Furthermore, once a single chuck or wafer is contaminated and goes undetected, this wafer or chuck could contaminate many other wafers or chucks thereby contributing to more widespread contamination. If undetected, a small area of contamination could spread to a larger area of contamination (i.e., cross-contamination has occurred).
A second prior art method of performing the contamination inspection is to actually run a test wafer through a number of processing steps in a tool. At each individual processing step, the wafer is removed from the tool, flipped over, and scanned on the wafer backside, given a wafer having a polished backside, via an ex situ laser process in order to determine the contamination introduced by the process. In order to monitor each process chamber for contamination, each wafer being processed would need to be removed, scanned and reintroduced into the tool to test yet another chamber in the tool. Alternatively, each chamber could have a dedicated wafer having a known contamination level that could be used to monitor all chambers in the tool. The limitations of this process is that a test wafer will generally be used, and that it requires removing the wafer from the processing tool in order to detect the contamination. This process also adversely affects throughput and may not detect contamination in time to avoid adverse contamination spreading in a multi-chamber processing tool. Normal wafers cannot be processed in this manner since the active surface of the wafer is typically damaged when the wafer is flipped over onto a particle scanning tool chuck. Overall, this process is very slow, inefficient, laborious and costly in a modern semiconductor manufacturing environment.
To date, conventional ex situ wafer backside particle detection is not effective or efficient. Wafer backside contamination threatens to reduce integrated circuit device yield in large wafers and/or in smaller lithographic dimensions due to lack of prompt detection and correction. A method of in situ contamination has not been developed to avoid contamination spreading within a multi-chamber tool. In a multi-chamber tool, identification of the one "problem chamber" using ex situ techniques is not efficient or accurate. Usually once a test wafer detects the contamination from a processing tool, the potential yield damage on processed wafers has already been done. To avoid these problems, many fabrication facilities frequently inactivate fabrication equipment and manually-clean the various chambers at frequent intervals to prevent a contamination problem that cannot be easily detected. This "over-maintenance" of the systems to prevent wafer backside contamination problems is costly and reduces throughput of the fabrication facility. Also, even if corrective action is taken, there is no current mechanism by which one can verify that the correction was effective without repeating the process.
Therefore, an automated methodology which is capable of efficiently detecting and correcting wafer backside contamination within a processing tool would be beneficial.